When a non-volatile memory such as a Flash or EEPROM is deleted or written, a tunnel effect, hot electron, or hot hole is used, so that a high voltage of approximately 12 V is required. As a conventional charge-pump type booster circuit which generates a high voltage, a Dicson charge pump diode-connected to a MOS transistor (hereinafter, “transfer MOS”) moving electric charges has been generally known and often used because a circuit configuration thereof is very simple. Such a Dicson charge pump is presented and analyzed in “A Dynamic Analysis of the Dicson Charge Pump”, IEEE, JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, No. 8, Aug. 1997. FIGS. 1 and 2 show structural diagrams of the Dicson charge pump. FIG. 1 is a conceptual block diagram disclosed also in the above IEEE document, and FIG. 2 is an example in which buffers in FIG. 1 are replaced by n-type MOSS. In FIG. 2, a drain and gate of the n-type MOS are short-circuited, and a CLK is applied to one side of a capacitance connected to the drain and source. The CLK and a CLKn have a complementary relation, as shown in FIG. 3. When the CLKn is “High” and the CLK is “Low”, drain potentials at odd-th stages such as first and third stages are higher than a source potential. Therefore, a drain current flows through the n-type MOSs at the odd-numbered stages, whereby electric charges are charged in odd-th capacitances C1 and C3. Conversely, when the CLK is “High” and the CLKn is “Low”, the drain potentials at even-th stages such as second and fourth stages are higher than the source potential. Therefore, a drain current flows through the n-type MOSs at the even-th stages, whereby electric charges are charged move from the odd-th capacitances C1 and C3 to even-th capacitances C2 and C4.
If it is assumed that each threshold voltage of n-type MOS transistors configuring the Dicson charge pump is Vt, an output voltage Vout thereof can be represented by:Vout=(Vcc−Vt)×N+Vcc  (1)                N: number of stages and Vcc: power-supply voltage.However, as approaching an output side, the drain and source voltages of the n-MOS transistor are boosted and, by an substrate effect caused due to an increase in a source-substrate voltage Vsb, a threshold voltage Vt of an NMOS transistor is increased as shown in the following Equation (2):Vt=Vt0+γ(√{square root over (2φf+Vsb)}−√{square root over (2φf)})  (2)        Vt0: Vt at Vsb=0 V, γ: substrate effect coefficient, and φf: Fermi level of substrate.Furthermore, since the Vsb at Vt=Vcc means the maximum voltage of boosted voltages obtained from the equation (2),        
                              Vout_max          ⁢                      (                          =              Vsb                        )                          =                                            (                                                                    Vcc                    -                    Vt0                                    γ                                +                                                      2                    ⁢                    ϕ                    ⁢                                                                                  ⁢                    f                                                              )                        2                    -                      2            ⁢            ϕ            ⁢                                                  ⁢            f                                              (        3        )            and therefore the maximum boosted voltage Vout_max can be calculated from the formula (3). FIG. 4 shows calculation values of the power-supply voltage Vcc and the boosted voltage Vout. As seen from FIG. 4, it is understood that in the Dicson charge pump, the boosted voltage Vout_max is determined depending on the power-supply voltage Vcc.
An improved version of Dicson charge pump has also been studied. In a “charge pump circuit device” disclosed in Japanese Patent Laid-Open No. 11-308856, the n-type MOSs are separated into a plurality of groups to suppress an increase in the Vt of the n-type MOS due to the substrate effect caused by increasing gradually the substrate voltage.
As the above-described Dicson charge pump that is a conventional technique is boosted, the source-substrate voltage Vsb of the n-type MOS is increased and thereby the threshold voltage Vt of the n-type MOS is increased due to an influence of the substrate effect, so that the maximum value of the boosted voltage is determined. As a result, by a low power-supply voltage equal to or lower than 3 V, a high voltage of approximately 12 V required for deleting or writing the non-volatile memory cannot be generated.
Moreover, even when the “charge pump circuit device”, which is disclosed in Japanese Patent Laid-Open No. 11-308856 and in which the n-type MOSs are separated into the plurality of groups to suppress an influence of the substrate effect caused by increasing gradually the substrate voltage, is used, there are the n-type MOSs not meeting Vsb=0 V, so that it is impossible to eliminate the substrate effects of all the n-type MOSs.
Also, “Semiconductor charge pump circuit and non-volatile semiconductor storage device” in Japanese Patent Laid-Open No. 2003-45193 discloses a scheme in which a charge voltage at a stage that precedes the immediately preceding stage is a substrate potential of the n-type MOS, wherein the different voltage values for each stage are set as the substrate potentials of the n-type MOS. However, the Vsb becomes a voltage-amplified value Vga (=Vcc−Vt) for at least one stage, so that the substrate effect is caused.
An object of the present invention is to provide a charge pump circuit having no influence of the substrate effects, and also to provide the charge pump circuit having an efficient circuit configuration and capable of generating a plus or minus high voltage.